Dr. Ji Lin
VERIFIED TECHNICAL DOSSIERSources checked

Dr. Ji Lin

Senior Research Scientist

2 Verified ArtifactsSource Checked & Attributed

Verified Proof of Work Artifacts

2 items cataloged

Each artifact below represents an authenticated research publication, production code repository, or technical architectural framework directly authored or co-created by Dr. Ji Lin. Every entry undergoes editorial source verification.

#1
RESEARCH Checked Sep 22, 2026

AWQ: Activation-aware Weight Quantization for On-Device LLM Compression

Authored the MLSys 2024 Best Paper introducing AWQ, demonstrating that protecting the top 1% salient weight channels based on activation magnitudes avoids backpropagation retraining and achieves lossless 4-bit inference.

Model & Execution Context:W4A16 GEMM kernels, LLaMA, Mistral, CodeLlama, NVIDIA TensorRT-LLM and vLLM runtimes.
Scope & Limitations

Extreme 2-bit quantization still requires second-order error compensation beyond magnitude scaling.

#2
IMPLEMENTATION Checked Sep 22, 2026

MCUNet: Tiny Deep Learning on IoT Devices with TinyEngine

Engineered TinyEngine, a specialized neural network runtime that co-designs model architecture (TinyNAS) and memory scheduling to run deep learning vision and speech models on microcontrollers with only 256KB SRAM.

Model & Execution Context:ARM Cortex-M7 microcontrollers, integer arithmetic, bare-metal C runtime.
Scope & Limitations

Static memory layout requires exact pre-compilation; dynamic tensor shapes are not supported on microcontrollers.