Jim Keller
VERIFIED TECHNICAL DOSSIERSources checked

Jim Keller

CEO, Tenstorrent | Legendary Microprocessor Architect (AMD Zen, Apple A4/A5, Tesla HW)

2 Verified ArtifactsSource Checked & Attributed

Verified Proof of Work Artifacts

2 items cataloged

Each artifact below represents an authenticated research publication, production code repository, or technical architectural framework directly authored or co-created by Jim Keller. Every entry undergoes editorial source verification.

#1
IMPLEMENTATION Checked Sep 23, 2026

Tesla Full Self-Driving (FSD) Dual-Chip Computer Architecture

Engineered Tesla's custom in-car FSD silicon featuring dual independent neural network accelerators processing 2,300 frames per second at under 72 watts, providing redundant lockstep execution for safety-critical real-time automotive vision.

Model & Execution Context:Custom dual NPU silicon operating on 8 camera streams at 36-teraops per chip.
Scope & Limitations

Thermal dissipation in vehicle environments imposes strict wattage ceilings on sustained inference throughput.

#2
IMPLEMENTATION Checked Sep 23, 2026

Tenstorrent Wormhole & Blackhole RISC-V AI Accelerator Architecture

Architected the Wormhole and Blackhole processor cards integrating Tensix array cores with native RISC-V scalar processors and on-chip Ethernet switches, enabling direct chip-to-chip 2D mesh networking for LLM tensor parallel training without external PCIe bridges.

Model & Execution Context:Scalable RISC-V and Tensix matrix cores running Llama 3 and DeepSeek MoE workloads over native Ethernet topology.
Scope & Limitations

Software compiler ecosystem (TT-Metalium) requires continuous software developer adoption to compete with NVIDIA CUDA.